Compiler Automates Processor Design

SANTA CLARA, Calif. July 7, 2004 – Tensilica, Inc. announced that it has achieved a major design automation breakthrough the automated design of optimized configurable processors from standard C code using the company’s new XPRES (Xtensa PRocessor Extension Synthesis) Compiler.
This tool enables the rapid development of optimized system-on-chip (SOC) devices without requiring designers to hand code their hardware using design languages like VHDL and Verilog.
Instead, designers input the original algorithm that they’re trying to optimize, written in standard ANSI C/C , and the XPRES Compiler, coupled with Tensilica’s automated processor generation technology, automatically generate an RTL (register transfer level) hardware description and associated software tool chain. In less than an hour, the resulting hardware block is delivered in the form of a pre-verified Xtensa LX processor core.
Additionally, the generated RTL fully rivals the performance and efficiency of hand-coded RTL blocks with many concurrent operations, efficient data types, and optimized multiple wide deep pipe
XPRES Compiler Automates Processor and RTL Design from Standard C Code

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