Embedded Computing: December 2004 Archives
I managed to fix simpescalar arm.
A post pointed me in the right direction.
The solution is to delete the if statement for cygwin 32 at the start of eval.c and range.c and place a #include
Also remove the if statement later on in the file that declares extern int errno.
I have been attempting to install Simplescalar onto my laptop for the past few days. As a result of this I accidently wiped my knoppix installation from my vmware environment. I discovered some install instructions that finally worked but it meant that I had to install RedHat ver 9.
Dr. Narahari provides some good instructions about how to install it. The one thing I would stress is that you must unpack all packages first!!!.
My usual approach is to unpack a package at a time and install, with simplescalar however some of the packages depend on libraries from other packages that haven't been installed such as simple-tools which contains the majority of the header files. So 3 days later I now have a working version of simpelscalar.
With new found optimisim I decided to install Simplescalar version for the ARM platform as Simplescalar handles MIPS instructions not ARM. The cross compiler kit has installed o.k but simplesim-arm is crashing out on errors with eval.c. There is a patch out there that might help.
I am currently experimenting with SimpleScalar which I why I have been updating my site for the past few days.
SimpleScalar can emulate the Alpha, PISA, ARM, and x86 instruction sets. The tool set includes a machine definition infrastructure that permits most architectural details to be separated from simulator implementations. All of the simulators distributed with the current release of SimpleScalar can run programs from any of the above listed instruction sets. Complex instruction set emulation (e.g., x86) can be implemented with or without microcode, making the SimpleScalar tools particularly useful for modeling CISC instruction sets.
SimpleScalar was created by Todd Austin. Development began while he was a Ph.D. student at the University of Wisconsin in Madison. Early versions of the tool set included contributions by Doug Burger and Guri Sohi. Today, SimpleScalar is developed and supported by SimpleScalar LLC.
According to Bill Yuricks website on Computer Architecture web sites
"in 2000 more than one third of all papers published in top computer architecture conferences used the SimpleScalar tools to evaluate their designs"
It was this comment that prompted me to have a look at the tool.
SimpleScalar LLC distribute their software under an open source model, trusting that the users will license the software that they use. The software is free for academic and research use.
The tool set is distributed with all source code, making it possible for users extend SimpleScalar, and to adapt existing models to their own ideas.
I came across this website today and was very impressed with the comprehensive list of simulators.
The Simulators are classified under the headings
Papers on Teaching with Computer System Simulators (authored by Bill Yurcik)
Historic Machine Simulators
Digital Logic Simulators
Theoretical Machine Simulators
Novice Hypothetical Machine Simulators
Intermediate Instruction Set Simulators
Advanced Microarchitecture Simulators
Multi-Processor Simulators (including Multi-Processor Interconnection Network Simulators)
Memory and Operating System Simulators
Embedded Processor Simulators
Quantum Computer Simulators
Miscellaneous Simulators
Meta Lists of Simulator Links and Tool Sets
David Yen an executive vice president at Sun Microsystems writes in cnet about te next wave of RISC processors. Due to declines in clock frequency, increases in Memory access and power budgets. It is now necessary to reassess the RISC architecture.
At Sun, they've termed this brave new future of RISC processor design radical chip multithreading (CMT). Radical CMT processors are designs crafted from the ground up to employ available resources as efficiently as possible in pursuit of their throughput goal. We're not talking about executing two to four threads in parallel, but 30 or more threads simultaneously.
As part of my phd research I require an open source RISC simulator. The candidate that seems to fit that profile is Spim.
Spim implements almost the entire MIPS32 assembler-extended instruction set. (It omits some complex floating point comparisons and rounding modes and details of the memory system page tables.) The MIPS architecture has several variants that differ in various ways (in particular, the MIPS64), which means that spim will not run programs compiled for all MIPS-based processors.
It was developed by James Larus, formerly: Professor, Computer Sciences Department, University of Wisconsin-Madison,currently: Senior Researcher at Microsoft Research.
Spim has the option to be cycle accurate and is available for Windows and Linux platforms.
If anyone is aware of any other RISC cycle accurate simulators, please email lnoonan_blog at yahoo.ie
