Tag Archive for simplescalar decode tree add instruction arm.def

Adding instructions to the Simplscalar decode tree.

The simplscalar decode tree for instructions can be at first quiet daunting.
Tracing the decode pattern is a pen and paper exercise.
e.g the range of instructions that start with 0x06 are defined as
DEFLINK(MEMREGPOST_LINK, 0x06, “memregpost_link”, 20, 0x0f)
This means shift the inst that start with 0x06 e.g 0x06000000 and examine bits 20 – 23
After the connect code we have an entry for 0x00 this means that if bits 20 -23 are 00 this will match and generate an opcode for this instruction
e.g 0x06000000
#define STR_R_IMPL \
etc etc
The challenge facing anyone is to add extra opcodes that are meaningful.
If one examines the 0x06 range of opcodes it is evident that instructions such as
0x06000100, 0x06000200 are unused.
So how do we use them in Simplescalar?
Well what we need to do is modify arm.def to examine bits 8 – 11 first, if these bits are 0 then they are the original instructions defined under memregpost. If not they are our new instructions.
A statement such as the one below takes care of examining bits 8 -11 of an inst that starts with 0x06
DEFLINK(MEMREGPOST_LINK, 0x06, “memregpost_link”, 8, 0x0f)
We now need to ensure that 0x06 instructions whose bits are 0 from pos 8 to 11 are directed to a different part of the decode tree. The deflink code below will be executed if the bits are 0 and will examine bits 20 – 23 of the 0x06 inst in the connect section.
In the example below inst 0x06000000 will be associated with a deflink to a new tree where the isnt str%c will be associated with 0x06000000. While inst 0x06000100 will be associated with the inst demo because bits 8 to 11 equate to 1
DEFLINK(MEMREGPOSTNEW_LINK, 0x00, “memregpostnew_link”, 20, 0x0f)
#define demo_IMPL \
DEFINST(demo, 0x01,
“demo%c”, “%d,%n,%m”,
#define STR_R_IMPL \
“str%c”, “%d,[%n],-%m!”,
We also need to to add these new opcodes to your gas see http://www-unix.ecs.umass.edu/~yhan/ for more details on how to hack GAS.